LPC47M997
LPC Super I/O with
Hardware Monitoring
Block
Data Brief
Product Features
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3.3 Volt Operation (SIO Block is 5 Volt Tolerant)
LPC Interface
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Keyboard Controller
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8042 Software Compatible
8 Bit Microcomputer
ACPI 1.0/2.0 Compliant
Fan Control
2k Bytes of Program ROM
256 Bytes of Data RAM
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Fan Speed Control Outputs (2)
Fan Tachometer Inputs (2)
Four Open Drain Outputs Dedicated for
Keyboard/Mouse Interface
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Programmable Wake-up Event Interface
PC98, PC99, PC01 Compliant
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Asynchronous Access to Two Data Registers and
One Status Register
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Supports Interrupt and Polling Access
8 Bit Counter Timer
Dual Game Port Interface
MPU-401 MIDI Support
Port 92 Support
Fast Gate A20 and KRESET Outputs
General Purpose Input/Output Pins (37)
ISA Plug-and-Play Compatible Register Set
Intelligent Auto Power Management
System Management Interrupt
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Serial Ports
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Two Full Function Serial Ports
High Speed 16C550A Compatible UARTs with
Send/Receive 16-Byte FIFOs
2.88MB Super I/O Floppy Disk Controller
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Supports 230k and 460k Baud
Programmable Baud Rate Generator
Modem Control Circuitry
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Licensed CMOS 765B Floppy Disk Controller
Software and Register Compatible with SMSC's
Proprietary 82077AA Compatible Core
480 Address and 15 IRQ Options
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Supports Two Floppy Drives
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Infrared Port
Configurable Open Drain/Push-Pull Output Drivers
Supports Vertical Recording Format
16-Byte Data FIFO
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Multiprotocol Infrared Interface
IrDA 1.0 Compliant
SHARP ASK IR
100% IBM Compatibility
480 Addresses, Up to 15 IRQ
Detects All Overrun and Underrun Conditions
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Multi-Mode Parallel Port with ChiProtect
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Sophisticated Power Control Circuitry (PCC)
Including Multiple Powerdown Modes for
Reduced Power Consumption
Standard Mode IBM PC/XT, PC/AT, and PS/2
Compatible Bi-directional Parallel Port
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Enhanced Parallel Port (EPP) Compatible - EPP 1.7
and EPP 1.9 (IEEE 1284 Compliant)
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DMA Enable Logic
Data Rate and Drive Control Registers
480 Address, Up to 15 IRQ and Three DMA Options
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IEEE 1284 Compliant Enhanced Capabilities Port
(ECP)
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ChiProtect Circuitry for Protection
Enhanced Digital Data Separator
960 Address, Up to 15 IRQ and Three DMA Options
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2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps
Data Rates
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Programmable Precompensation Modes
SMSC LPC47M997
Page 1
Rev. 01-12-07
PRODUCT PREVIEW
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123
Copyright © 2007 SMSC or its subsidiaries. All rights reserved.
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete
information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no
responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without
notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information
does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of
SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's
standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or
errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon
request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure
could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC
and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms
Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES
OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND
ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY
DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR
REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC
OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO
HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
DAMAGES.
SMSC LPC47M997
Page 3
Rev. 01-12-07
PRODUCT PREVIEW
Block Diagram
CLK32
2nd Infrared Port
Game Port
Fan Control
LEDs
CLOCK
GEN
CLOCKI
PD[7,0]
SER_IRQ
PCI_CLK
SERIAL
IRQ
Multi-Mode
Parallel Port
with
Busy, Slct, PE,
ERROR, ACK
ChiProtectTM
FDC MUX
/
LAD[3:0]
LFrame
Internal Bus
(Data, Address, and Control lines)
STROBE, INIT, SLCTIN,
ALF
LPC
Bus Interface
(see LPC47B27x)
LDRQ
PCI_RESET
LPCPD
TXD1, RXD1
CTS1, RTS1
DSR1, DTR1
DCD1, RI1
High-Speed
16550A
UART
IO_PME*
IO_SMI*
LPC47M997
(128 QFP)
Power Mgmt
PORT 1
GP1[0:7]*
GP2[0:2,4:7]*
General
Purpose
I/O
GP3[0:7]*, GP4[0:3]*
GP5[0:7]*, GP6[0:1]*
TXD2 (IRTX)*,
RXD2 (IRRX)*
High-Speed
16550A
UART
CTS2*, RTS2 *
DSR2*, DTR2*
SDA
SMBus
SCL
VID0
VID1
PORT 2
DCD2*, RI2*
VID2
VID3
WDATA
MIDI_IN*
WCLOCK
MPU-401
12V_IN/VID4
+5V_IN
Serial Port
MIDI_OUT*
DIGITAL DATA
SEPARATOR
WITH WRITE
PRECOM-
Hardware
Monitoring
SMC PROPRIETARY
82077 COMPATIBLE
VERTICAL
FLOPPYDISK
CONTROLLER CORE
+3.3V_IN
+2.5V_IN
+1.8V_IN
KCLK, MCLK
PENSATION
KDATA, MDATA
GateA20*
+1.5V_IN
Vccp_IN
Keyboard/Mouse
8042
controller
KRESET*
RCLOCK
RDATA
HVCC
HVSS
P12*, P16*, P17*
A0/RESET#/THERM#/
XNOR_OUT
Note 1: This diagram does not show power and ground
connections.
Note 2: Functions with "*" are located on multifunctional pins.
This diagram is designed to show the various functions
available on the chip (not pin layout).
Figure 1 - LPC47M997 Block Diagram
Rev. 01-12-07
Page 4
SMSC LPC47M997
PRODUCT PREVIEW
Package Outline
Figure 2 - 128 PIN QFP Package Outline, 14x20x2.7 Body, 3.2 mm Footprint
Table 1 - 128 PIN QFP Package Parameters
MIN
~
NOMINAL
MAX
3.4
0.5
REMARKS
Overall Package Height
Standoff
~
~
~
A
A1
A2
D
D1
E
E1
H
L
0.05
2.55
23.00
19.90
17.00
13.90
0.09
0.73
~
3.05
23.40
20.10
17.40
14.10
0.20
1.03
~
Body Thickness
X Span
X body Size
Y Span
Y body Size
23.20
20.00
17.20
14.00
~
0.88
1.60
Lead Frame Thickness
Lead Foot Length
Lead Length
L1
e
0.50 Basic
Lead Pitch
Lead Foot Angle
Lead Width
0o
0.10
0.08
0.08
~
~
~
~
~
~
7o
0.30
~
0.30
0.08
θ
W
R1
R2
ccc
Lead Shoulder Radius
Lead Foot Radius
Coplanarity
Notes:
1. Controlling Unit: millimeter.
2. Tolerance on the position of the leads is ± 0.04 mm maximum.
3. Package body dimensions D1 and E1 do not include the mold protrusion.
Maximum mold protrusion is 0.25 mm.
4. Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.
5. Details of pin 1 identifier are optional but must be located within the zone indicated.
SMSC LPC47M997
Page 5
Rev. 01-12-07
PRODUCT PREVIEW
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